Lead Systems Engineer -High Speed Interconnect IPs.
Company: Cadence Design Systems
Location: San Jose
Posted on: November 13, 2024
|
|
Job Description:
Lead Systems Engineer -High Speed Interconnect IPs. page is
loaded Lead Systems Engineer -High Speed Interconnect IPs. Apply
locations SAN JOSE time type Full time posted on Posted Yesterday
job requisition id R46427 At Cadence, we hire and develop leaders
and innovators who want to make an impact on the world of
technology. Join a growing and dynamic IP team and help lead the
development of best in class digital and mixed signal IP and
subsystem products. This is a tremendous opportunity to work with
an experienced team focusing on development of high-performance
silicon subsystems integrating Controller and PHY IPs related to
protocols such as PCIe/CXL, UCIe , Ethernet---. You will be a key
member of technical staff in an organization responsible for IP
activities including but not limited to developing sub system
prototypes in hardware and software, Help Product marketing team in
sub system solutions launch, Pre-sales technical engagement with
potential customers. This candidate will be the primary interface
between customers (internal and external) customers CDNS R&D/
Silicon Systems validation team. Candidate should possess strong
communication skills with ability to manage multiple priorities on
day -to-day basis. Ownership of tasks, ability to collaborate with
remote teams located worldwide and clear communication of status,
are must have attributes in this role. The annual salary range for
California is $131,600 to $244,400. You may also be eligible to
receive incentive compensation: bonus, equity, and benefits. Sales
positions generally offer a competitive On Target Earnings (OTE)
incentive compensation structure. Please note that the salary range
is a guideline and compensation may vary based on factors such as
qualifications, skill level, competencies and work location. Our
benefits programs include: paid vacation and paid holidays, 401(k)
plan with employer match, employee stock purchase plan, a variety
of medical, dental and vision plan options, and more. We're doing
work that matters. Help us solve what others can't. Similar Jobs
(3) Senior Applications Engineer, DDR Design IP locations SAN JOSE
time type Full time posted on Posted 22 Days Ago Lead Application
Engineer, Serdes Design IP locations SAN JOSE time type Full time
posted on Posted 30+ Days Ago Senior/Returnship, Signal Integrity
(SI) and Power Integrity (PI) - Principal Applications Engineer
locations SAN JOSE time type Full time posted on Posted 30+ Days
Ago Cadence plays a critical role in creating the technologies that
modern life depends on. We are a global electronic design
automation company, providing software, hardware, and intellectual
property to design advanced semiconductor chips that enable our
customers create revolutionary products and experiences.Thanks to
the outstanding caliber of the Cadence team and the empowering
culture that we have cultivated for over 25 years, Cadence
continues to be recognized by Fortune Magazine as one of the 100
Best Companies to Work For. Our shared passion for solving the
world's toughest technical challenges, our dedication to pushing
the limits of the industry, and our drive to do meaningful work
differentiates the people of Cadence.
- Cadence is committed to creating a diverse environment and is
proud to be an equal opportunity employer. All qualified applicants
will receive consideration for employment without regard to race,
color, sex, age, national origin, religion, sexual orientation,
gender identity, status as a veteran, basis of disability, or any
other protected class.
#J-18808-Ljbffr
Keywords: Cadence Design Systems, Madera , Lead Systems Engineer -High Speed Interconnect IPs., Other , San Jose, California
Click
here to apply!
|